NEW ( C->A | A->B | B->C)
--- 
PortA = DATA_BUS[0:7]
PortB = todo (t0, t1, ain0, ain1, SS, MOSI, MISO, SCK)
PortC = ADDR_BUS[7:0]
PortD = unchanged (RXD, TXD, /OUT, /IN, pwm1, pwm0, dtr, /WAIT)
115200 divider = 7
230400 divider = 3 

OLD
---
PortA = 5 bit Output, 1 bit LED, 2 bits analog Inputs ($00)
DDRA =$04 (%0000 0100)

PortB = Address selector ($00)
DDRB = $00

PortC = Data In/Out ($00)
DDRC = $00
    
PortD = WAIT, COM, PWM2, PWM1, RD, WR, TX, RX ($3F | %0011 1111)
DDRD = $72 (%0111 0010)

You can remove:
- LED
- ADC
Because they no more exists

; 00        IN/OUT  10101010    TEST BYTE #1 / RESET
; 01        IN/OUT  01010101    TEST BYTE #2 / RESET

; 02        OUT     00-$FF      PWM CHANNEL 1
; 03        OUT     00-$FF      PWM CHANNEL 2

; 04        IN/OUT  00-$FF      UBRR/BAUD RATE
; 05        IN/OUT  00-$FF      UDR READ/WRITE
; 06        IN/OUT  00-$FF      UART REG 1
; 07        IN/OUT  00-$FF      UART REG 2
; 08        OUT     00-$FF      UART TX/AUTO POLLING
; 09        IN      00/$FF      UART WAIT UDR CHARACTER
; 0A        IN/OUT  00-$FF      UART READ TIME OUT*50ms
; 0B        IN/OUT  00-$01      UART REG 3

; 0C        IN/OUT  00-$01      EEPROM ADDRESS HIGH
; 0D        IN/OUT  00-$FF      EEPROM ADDRESS LOW
; 0E        IN/OUT  00-$FF      EEPROM READ/WRITE

; 0F        IN/OUT  00000XXX    ADC SAMPLING FREQUENCY
; 10        IN/OUT  00-$01      ADC CHANNEL SELECTION
; 11        IN      00-$FF      READ ADC VALUE

; 12        IN/OUT  00-$FF      KEYBOARD READ

; 13        OUT     00-$7F      PAGE WRITE FOR UPDATE
; 14        OUT     00-$FF      DATA FOR UPDATE BUFFER
; 15        IN/OUT  00-$7F      ADDRESS OF BUFFER FOR BIOS UPDATE

; 16        IN/OUT  00-$7F      ROM PAGE NUMBER
; 17        IN/OUT  00-$7F      ADDRESS OF PAGE
; 18        IN      00-$FF      READ ROM DATA (PAGE MODE)

; 19        IN/OUT  00-$3F      ROM ADDRESS HIGH
; 1A        IN/OUT  00-$FF      ROM ADRESS LOW
; 1B        IN      00-$FF      READ ROM DATA (ADDRESSING MODE)

; 1C        IN/OUT  00-$FF      AVAILABLE CHARACTER IN UART BUFFER / RESET UART BUFFER
; 1D        IN      00-$FF      READ CHARACTER FROM BUFFER

; 1E        IN/OUT  00-$1F      5 BITS PORT DIRECTION SETTING
; 1F        IN/OUT  00-$1F      5 BITS PORT LATCH (OUTPUT)
; 20        IN      00-$1F      5 BITS PORT INPUT

; 21        OUT     00-$FF      MULTIPLIER 1
; 22        OUT     00-$FF      MULTIPLIER 2
; 23        IN      00-$FF      RESULT HIGH BYTE
; 24        IN      00-$FF      RESULT LOW BYTE

; 25        IN/OUT  00-$FF      READ VERSION

; 26        OUT     00-$FF      PWM BUFFERED STEREO
; 27        OUT     00-$FF      PWM MONO TO BOTH CHANNELS

; 28        IN/OUT  00-$FF      RAM ADDRESS
; 29        IN/OUT  00-$FF      RAM DATA
; 2A        IN/OUT  00-$FF      RAM DATA POST INCREMENT

; 1 WIRE PROTOCOL
; 2B        IN      00-$FF      RESET 1 WIRE BUS
; 2C        IN/OUT  00-$FF      1 WIRE TX / 1 WIRE RX

Table with the lower address byte inversions
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00 80 40 C0 20 A0 60 E0 10 90 50 D0 30 B0 70 F0

10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F
08 88 48 C8 28 A8 68 E8 18 98 58 D8 38 B8 78 F8

20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F
04 84 44 C4 24 A4 64 E4 14 94 54 D4 34 B4 74 F4
0000 -> 0000 -> 0
0001 -> 1000 -> 8
0010 -> 0100 -> 4
0011 -> 1100 -> C
0100 -> 0010 -> 2
0101 -> 1010 -> A
0110 -> 0110 -> 6
0111 -> 1110 -> E
1000 -> 0001 -> 1
1001 -> 1001 -> 9
1010 -> 0101 -> 5
1011 -> 1101 -> D
1100 -> 0011 -> 3
1101 -> 1011 -> B
1110 -> 0111 -> 7
1111 -> 1111 -> F

00 04 08 10 14 18 20 24 28 30 34 38 40 44 48 50 54 58 
60 64 68 70 74 78 80 84 88 90 94 98 A0 A4 A8 B0 B4 B8
C0 C4 C8 D0 D4 D8 E0 E4 E8 F0 F4 F8

SPI (Control, Status and Data)
2D 2E 2F
B4 74 F4
*READ_SPI_CONTROL (B4)
*WRITE_SPI_CONTROL (B4)
*SPI_READ (74)
*SPI_WRITE (74)
*READ_SPI_STATUS (F4)
*WRITE_SPI_STATUS (F4)

- SPI -
PortB = todo (t0, t1, ain0, ain1, SS, MOSI, MISO, SCK)
SCK -> Shift Clock used for synchronize the data transfer between two chips (SCLK)
SS  -> Slave Select, used for initiate and terminate the data transfer (CE)
MOSI-> Data Input. Master Out Slave In (SDI)
MISO-> Data Output. Master In Slave Out (SDO)

In the 3-wire interface MOSI and MISO are in the same pin.

 AVR        SPI Dev
Master       Slave
------      -------
 MISO <----- MOSI
 MOSI -----> MISO
 SCK  -----> SCK
 SS   -----> SS

Protocol:
AVR generate the SCLK.
During the transfer SS is high.
Send bytes, first byte address, second data.
D7 in address byte is 1 for write and 0 for read.

Master and Slave must agree in clock polarity (CPOL) and phase (CPHA).
CPOL CPHA   Data Read and Change Time                       SPI
 0    0     Read on rising edge, changed on a falling edge   0
            Positive Pulse. Latch, then Shift.	

 0    1     Read on falling edge, changed on a rising edge   1
            Positive Pulse. Shift, then Latch.	

 1    0     Read on falling edge, changed on a rising edge   2
            Negative Pulse. Latch, then Shift.	

 1    1     Read on rising edge, changed on a falling edge   3
            Negative Pulse. Shift, then Latch.
 
 Write bytes protocol
--------------------
a) Single byte write
1.- Make SS = 0 to begin to write
2.- Send address byte (A7 = 1)
3.- SPI wait for data byte
4.- Send data byte
5.- Make SS = 1 to signal end of writting

b) Multibyte burst write
1.- Make SS = 0 to begin to write
2.- Send address byte (A7 = 1)
3.- SPI wait for data byte
4.- Send data bytes (from one on one)
5.- Make SS = 1 to signal end of writting

Read bytes protocol
-------------------
a) Single byte read
1.- Make SS = 0 to begin to read
2.- Send address byte (A7 = 0)
3.- SPI send the data byte
4.- Read data byte
5.- Make SS = 1 to signal end of reading

b) Multibyte burst read
1.- Make SS = 0 to begin to read
2.- Send address byte (A7 = 0)
3.- SPI send the data bytes and avr read the data bytes
4.- Make SS = 1 to signal end of reading

SPI programming in AVR
----------------------
The AVR has 3 registers associated with SPI:
1.- SPSR (SPI Status Register)
%SPIF WCOL - - - - - SPI2X
  R    R   R R R R R  R/W

SPIF (SPI Interrupt flag): In Master mode, this bit is set in two situations:
    a) When a serial transfer is completed.
    b) When SS is an input and is set low by an external device.
    Set this bit to 1 will cause an interrupt if SPIE in SPCR is set and global interrupts are enabled.
 

WCOL (Write Collision Flag): This bit is set if you write in SPDR during a data transfer.

SPI2X (Double SPI Speed): When SPI is in Master mode, setting this bit to one doubles the SPI speed.

WCOL and SPIF are cleared when you read SPSR and then access to SPDR. Alternativaly, the SPIF bit is cleared by hardware when executing the corresponding interrupt handler.

2.- SPCR (SPI Control Register)
%SPIE SPE DORD MSTR CPOL CPHA SPR1 SPR0
  R/W R/W  R/W  R/W  R/W  R/W  R/W  R/W

SPIE (SPI Interupt Enable): Set this bit to enable the SPI interrupt.

SPE (SPI Enable): Set this bit to enable the SPI.

DORD (Data Order): 1 = sends LSB first | 0 = sends MSB first

MSTR (Master/Slave Select): 1 = Master Mode | 0 = Slave Mode (NOTA P610)

CPOL (Clock Polarity): 0 = Base clock 0 | 1 = Base clock = 1

CPHA (Clock Phase): 0 = Sample on leading clock edge | 1 = Sample on trailing clock edge

SPR1-SPR0 (SPI Clock Rate)
    SPI2X   SPR1    SPR0    SCK Freq
      0      0       0       Fosc/4
      0      0       1       Fosc/16
      0      1       0       Fosc/64
      0      1       1       Fosc/128
      1      0       0       Fosc/2 (Not Recommended!)
      1      0       1       Fosc/8
      1      1       0       Fosc/32
      1      1       1       Fosc/64

3.- SPDR (SPI Data Register)
Read/Write Data byte
-*-
; -----------------------------------------------------------------------------
; Write a byte in the SPI
; -----------------------------------------------------------------------------
SPI_WRITE:
;    ; SS = 0 to start the write operation
;    CBI  PORTB,SS

    ; Read byte from the CPC
    IN   A,PINA

    ; Put that byte in SPDR
    OUT  SPDR,A

    ; Check the transfer has been made
WAIT_SPI_WRITE:
    SBIS SPSR,SPIF
    RJMP WAIT_SPI_WRITE

;    ; Make SS = 1 to signal end of writting
;    SBI  PORTB,SS

    RJMP WR_END

; -----------------------------------------------------------------------------
; Read a byte from the SPI
; -----------------------------------------------------------------------------
SPI_READ:
;    ; SS = 0 to start the write operation
;    CBI  PORTB,SS

    ; Write a dummy byte in SPDR
    LDI  A,0
    OUT  SPDR,A

    ; Check the transfer has been made
WAIT_SPI_READ:
    SBIS SPSR,SPIF
    RJMP WAIT_SPI_READ

    ; Read a byte from the SPI
    IN   A,SPDR
    
    ; Send the byte to the CPC
    OUT  PORTA,A

;    ; Make SS = 1 to signal end of writting
;    SBI  PORTB,SS

    RJMP RD_END

; -----------------------------------------------------------------------------
; Write SPI Status register.
; We are using this port for controling SS in SPI (PORTB)
; -----------------------------------------------------------------------------
WRITE_SPI_STATUS:
    ; Read a byte from the CPC
    IN   A,PINA

    ; Check if the lower bit is 0
    ROR  A
    BRCC START_SPI_OPERATION

STOP_SPI_OPERATION:
    SBI  PORTB,SS                   ; SS = 1 -> Stop the read/write operation
    RJMP WR_END

START_SPI_OPERATION:
    CBI  PORTB,SS                   ; SS = 0 -> Start the read/write operation
    RJMP WR_END
    
; -----------------------------------------------------------------------------
; Read SPI Status register
; -----------------------------------------------------------------------------
READ_SPI_STATUS:
    ; Read the SPI Status register
    IN   A,SPSR

    ; Send to the CPC
    OUT  PORTA,A
    
    RJMP RD_END

; -----------------------------------------------------------------------------
; Write SPI Control register
; -----------------------------------------------------------------------------
WRITE_SPI_CONTROL:
    ; Read a byte from the CPC
    IN   A,PINA

    ; Write in the SPI Status register
    OUT  SPCR,A
    
    RJMP WR_END
    
; -----------------------------------------------------------------------------
; Read SPI Control register
; -----------------------------------------------------------------------------
READ_SPI_CONTROL:
    ; Read the SPI Status register
    IN   A,SPCR

    ; Send to the CPC
    OUT  PORTA,A
    
    RJMP RD_END
-*-
DS1302 Clock
------------
The clock has 31 bytes of RAM and 8 bytes of Clock RAM.

Commad byte
    Initiate each data transfer.
    %1 RAM|!CK A4 A3 A2 A1 A0 RD|!WR
    RAM|!CK -> 1 = RAM | 0 = Clock
    A4-A0   -> Register 0 - 31
    RD|!WR  -> 1 = Read (Output) | 0 = Write (Input)

    * Burst mode:
    Set A4-A0 = %11111, then the read/write start in address 0.
    When the clock RAM is written the 8 bytes must be sent (in order) for the data to be transfered. In RAM mode, every byte send is written.

Clock/Calendar
    The Clock registers are in BCD format. Format in page 9.
    The day of the week values are user defined, but must be sequential (Sunday = 1, Monday = 2, ...).
    Illogical times and dates entries result in undefined operation.
    When the seconds register is written, the countdown is reset and the rest of registers must be written within a second.
    Bit 7 of the hours register control the 12-hour (1) or 24-hour (0) mode. In the 12-hour mode, bit 5 is the AM (0) / PM (1) bit. In the 24-hour mode, bit 5 is the second 10-hour bit (20-23 hours). The hours data must be re-initialized whenever the 12/24 bit is changed.

Clock Halt Flag
    Bit 7 of clock register 2 is 1, the clock oscillator is stopped. When is 0, the clock will start. The initial power-on state is not defined.

Write-Protect Bit
    Bit 7 of clock register 8 must be 0, before any write operation in the clock or the ram. Bit 7 = 1 write protected. The initial power-on state is not defined.

Trickle-Charge Register

a) Single byte write
1.- Make SS = 0 to begin to write
2.- Send address byte (A7 = 1) ($C0)
3.- SPI wait for data byte
4.- Send data byte              ($xx)
5.- Make SS = 1 to signal end of writting

SPI Program
; SPI PROTOCOL
; 2D        IN/OUT  00-$FF      SPI CONTROL 
; 2E        IN/OUT  00-$FF      SPI STATUS (Read Status | Write SS (lower bit)
; 2F        IN/OUT  00-$FF      SPI DATA (Read/Write byte in the SPI)

1.- Write a byte in the RAM
; Enable SPI (SPI Control):
; No INT, SPI Ena, Sends MSB, Master,
; Clock Phase & Polarity (SPI mode 0-3),
; SPI Clock Rate (0 - 3: Fosc/4, Fosc/16, Fosc/64, Fosc/128)
OUT &FF2D,&50 ; %01010000

; SS = 0, begin transfer
OUT &FF2E,0

; Unprotect the DS1302 (Bit 7 in register 8 of clock mode)
; Address (1), Clock (0), Register 8 (00111) and Write (0)
OUT &FF2F,&8E ; %10001110

; Bit 7 of register 8 at 0
OUT &FF2F,&00

; SS = 1, end transfer
OUT &FF2E,1

; SS = 0, begin transfer
OUT &FF2E,0

; Write a byte in the address 0 of RAM
; Address (1), Clock (1), Address 0 (00000) and Write (0)
OUT &FF2F,&C0 ; %11000000
OUT &FF2F,65  ; Write 'A'

; SS = 1, end transfer
OUT &FF2E,1

; SS = 0, begin transfer
OUT &FF2E,0

; Read a byte from the address 0 of RAM
; Address (1), Clock (1), Address 0 (00000) and Read (1)
OUT &FF2F,&C0 ; %11000001
VAL=INP(&FF2F)

; I'm going to close the SPI transfer before to print values

; SS = 1, end transfer
OUT &FF2E,1

; Disable SPI
OUT &FF2D,&00 ; %00000000

PRINT VAL;" -> ";CHR$(1);CHR$(VAL) ; Must be '65 -> A'

Possible bugs, the DS1302 is a half-duplex device, that means our write of a dummy value in the READ_SPI function could stop the read operation, maybe we need to delete the write of the dummy in half-duplex system or change the dummy value from 0 to another dummy value doesn't interrupt the transfer.

And if it works, then we need to start to work in data/time and burst mode :)

----
Handling and SD in SPI mode

; SPI PROTOCOL
; 2D        IN/OUT  00-$FF      SPI CONTROL 
; 2E        IN/OUT  00-$FF      SPI STATUS (Read Status | Write SS (lower bit)
; 2F        IN/OUT  00-$FF      SPI DATA (Read/Write byte in the SPI)

1.- Write a byte in the RAM
; Enable SPI (SPI Control):
; No INT, SPI Ena, Sends MSB, Master,
; Clock Phase & Polarity (SPI mode 0-3),
; SPI Clock Rate (0 - 3: Fosc/4, Fosc/16, Fosc/64, Fosc/128)
; The speed needs to be 400kHz for compatibility with SD and MMC cards
;OUT &FF2D,&50 ; %01010000 Fosc/4
OUT &FF2D,&51 ; %01010001 Fosc/16

2.- Initialize SD
; SS = 1, stop transfer in SPI
OUT &FF2E,1

; Send at least 74 pulses (8 * 10)
FOR i = 0 TO 10
OUT &FF2F,&FF
WHILE ((INP(&FF2E) AND &80) <> &80):WEND 
NEXT

; SS = 0, begin transfer
OUT &FF2E,0

FOR i = 0 TO 2
OUT &FF2F,&FF
NEXT

; Send Reset command (0x40,0,0,0x95)
OUT &FF2F,&FF

OUT &FF2F,&40

OUT &FF2F,&00   ; Upper byte
OUT &FF2F,&00   ; Lower byte

OUT &FF2F,&00   ; Upper byte
OUT &FF2F,&00   ; Lower byte

OUT &FF2F,&95
OUT &FF2F,&FF

errcode = INP(&FF2F)

; Send Free SD command (0x41,0,0,0xFF)
1000 REM SD is free?
OUT &FF2F,&FF

OUT &FF2F,&41

OUT &FF2F,&00   ; Upper byte
OUT &FF2F,&00   ; Lower byte

OUT &FF2F,&00   ; Upper byte
OUT &FF2F,&00   ; Lower byte

OUT &FF2F,&FF
OUT &FF2F,&FF

errcode = INP(&FF2F)
if errcode <> 0 then goto 1000

; Send command 8, only understood by SDHC cards (the rest ignore this command)
OUT &FF2F,&FF

OUT &FF2F,&48

OUT &FF2F,&00   ; Upper byte
OUT &FF2F,&00   ; Lower byte

OUT &FF2F,&01   ; Upper byte
OUT &FF2F,&AA   ; Lower byte

OUT &FF2F,&87
OUT &FF2F,&FF

errcode = INP(&FF2F)

; Now the card is intialized and ready to accept acual commands.
; We initialize it with "Application Command" 41. 
FOR i = 0 to 31
; Send command 55
OUT &FF2F,&FF

OUT &FF2F,&77

OUT &FF2F,&00   ; Upper byte
OUT &FF2F,&00   ; Lower byte

OUT &FF2F,&00   ; Upper byte
OUT &FF2F,&00   ; Lower byte

OUT &FF2F,&65
OUT &FF2F,&FF

errcode = INP(&FF2F)

; Send application command 41
OUT &FF2F,&FF

OUT &FF2F,&69

OUT &FF2F,&40   ; Upper byte
OUT &FF2F,&00   ; Lower byte

OUT &FF2F,&00   ; Upper byte
OUT &FF2F,&00   ; Lower byte

OUT &FF2F,&77
OUT &FF2F,&FF

errcode = INP(&FF2F)
    
IF errcode == 0 THEN GOTO 10000 : REM End initialization SD

PRINT "."
NEXT
PRINT "ERROR"
END

; Card initialized, we need to read the OCR register of the SD (command 58)
10000
OUT &FF2F,&FF

OUT &FF2F,&7A

OUT &FF2F,&00   ; Upper byte
OUT &FF2F,&00   ; Lower byte

OUT &FF2F,&00   ; Upper byte
OUT &FF2F,&00   ; Lower byte

OUT &FF2F,&FF
OUT &FF2F,&FF

errcode = INP(&FF2F)

ocr_register = INP(&FF2F)
dummy_read = INP(&FF2F)
dummy_read = INP(&FF2F)
dummy_read = INP(&FF2F)

; SS = 1, stop transfer in SPI :P
OUT &FF2E,1

print HEX$(ocr_register) : REM 0 = SD, $40 = SHDC

---
; 2D        IN/OUT  00-$FF      SPI CONTROL 
; 2E        IN/OUT  00-$FF      SPI STATUS (Read Status | Write SS (lower bit)
; 2F        IN/OUT  00-$FF      SPI DATA (Read/Write byte in the SPI)

10 PRINT "Initialize SPI %01010001 Fosc/16"
20 OUT &FF2D,&51
30 PRINT "SS = 1, stop transfer in SPI"
20 OUT &FF2E,1
100 PRINT "Send at least 74 pulses (8 * 10 = 80 clock pulses at 400 KHz)"
110 FOR i=0 TO 10
120 byte=&FF:GOSUB 10000
130 NEXT
140 PRINT "SS = 0, begin transfer":OUT &FF2E,0
200 PRINT "Send at least 16 pulses (2 * 8 = 16 clock pulses at 400 KHz)"
210 FOR i=0 TO 2
220 byte=&FF:GOSUB 10000
230 NEXT
300 PRINT "Send Reset command (0x40,0x0000,0x0000,0x95)"
310 cmd=&40:h1=0:l1=0:h2=0:l2=0:crc=&95:GOSUB 20000
320 errcode=byte
400 PRINT "Send -is SD idle?- command (0x41,0x0000,0x0000,0xFF)"
410 cmd=&41:h1=0:l1=0:h2=0:l2=0:crc=&ff:GOSUB 20000
420 errcode=byte
430 if (errcode <> 0) then goto 400
450 PRINT "Set SPI speed %01010000 Fosc/4":OUT &FF2D,&50
500 PRINT "Send CMD8, only understood by SDHC cards (the rest ignore this command)"
510 cmd=&48:h1=0:l1=0:h2=&01:l2=&aa:crc=&87:GOSUB 20000
520 errcode=byte
580 PRINT "Now the card is intialized and ready to accept acual commands."
590 PRINT "We initialize the card with ACMD41
600 PRINT "Every ACMD41 is prefixed with CMD55"
610 FOR i=0 to 31
620 PRINT "Send CMD55"
630 cmd=&77:h1=0:l1=0:h2=0:l2=0:crc=&65:GOSUB 20000
640 errcode=byte
650 PRINT "Send ACMD41"
660 cmd=&69:h1=&40:l1=0:h2=0:l2=0:crc=&77:GOSUB 20000
670 errcode=byte
680 IF (errcode == 0) THEN GOTO 800    
690 PRINT ".";:NEXT
700 PRINT "Error in the SD initialization"
710 PRINT:PRINT "ERROR":END
800 PRINT "SD Card initialized, we need to read the OCR register of the SD (CMD58)"
810 cmd=&7a:h1=0:l1=0:h2=0:l2=0:crc=&ff:GOSUB 20000
820 errcode=byte
830 if (errcode <> 0) THEN PRINT "Error SD answering":GOTO 700
840 byte=&FF:GOSUB 10000:ocr_register=byte
850 byte=&FF:GOSUB 10000:dummy_read1=byte
860 byte=&FF:GOSUB 10000:dummy_read2=byte
870 byte=&FF:GOSUB 10000:dummy_read3=byte
880 print "OCR = ";HEX$(ocr_register):REM 0 = SD, $40 = SHDC
900 PRINT "SS = 1, stop transfer in SPI :P"
910 OUT &FF2E,1
10000 REM Send byte to the SPI
10010 OUT &FF2F,byte
10020 REM Check the transfer has been made
10030 WHILE ((INP(&FF2E) AND &80) <> &80):WEND
10040 REM Get the return value
10050 byte=INP(&FF2F)
10060 RETURN
20000 REM Send command
20010 byte=&FF:GOSUB 10000:REM Send dummy value
20020 byte=cmd:GOSUB 10000:REM Send command byte
20030 byte=h1:GOSUB 10000:REM Send high byte param 1
20040 byte=l1:GOSUB 10000:REM Send low byte param 1
20050 byte=h2:GOSUB 10000:REM Send high byte param 2
20060 byte=l2:GOSUB 10000:REM Send low byte param 2
20070 byte=crc:GOSUB 10000:REM Send CRC
20080 byte=&FF:GOSUB 10000:REM Send dummy value
20090 byte=&FF:GOSUB 10000:REM Send dummy value to get the last byte received
20100 RETURN
